Linda Milor
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Full Citation Orshansky, M., Milor, L., Chen, P., Keutzer, K., & Hu, C. (2002). Impact of spatial intrachip gate length… Read more.
15–22 minutes -
Full Citation: Orshansky, M., Milor, L., & Hu, C. (2004). Characterization of spatial intrafield gate CD variability, its impact on… Read more.
11–16 minutes -
Full Citation Choi, M., & Milor, L. (2006). Impact on circuit performance of deterministic within-die variation in nanoscale semiconductor manufacturing. IEEE… Read more.
12–18 minutes -
Full citation: M. Choi and L. Milor, “Diagnosis of Optical Lithography Faults With Product Test Sets,” IEEE Transactions on Computer-Aided Design of… Read more.
9–13 minutes -
Full citation: Cheng Jia and Linda Milor, “A BIST Circuit for DLL Fault Detection,” IEEE Transactions on Very Large Scale Integration (VLSI)… Read more.
9–14 minutes -
Full citation: Cheng Jia and Linda Milor, “A DLL Design for Testing I/O Setup and Hold Times,” IEEE Transactions on Very Large… Read more.
9–13 minutes -
Full citation: Bashir, Muhammad, and Linda Milor. “Modeling Low-k Dielectric Breakdown to Determine Lifetime Requirements.” IEEE Design & Test of Computers, November/December… Read more.
8–12 minutes -
Full citation: Milor, L., & Hong, C. (2010). “Area Scaling for Backend Dielectric Breakdown.” IEEE Transactions on Semiconductor Manufacturing, 23(3), 429–441. https://doi.org/10.1109/TSM.2010.2051730. Plain-Language Overview… Read more.
9–14 minutes -
Full citation: Muhammad Muqarrab Bashir and Linda Milor, “Determining the Impact of Within-Die Variation on Circuit Timing,” IEEE Transactions on Semiconductor Manufacturing,… Read more.
9–13 minutes -
Full citation: Ahmed, F., & Milor, L. (2012). “Analysis and On-Chip Monitoring of Gate Oxide Breakdown in SRAM Cells.” IEEE Transactions on… Read more.
10–15 minutes