Manufacturing Variations and Circuit Performances
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Full Citation Orshansky, M., Milor, L., Chen, P., Keutzer, K., & Hu, C. (2002). Impact of spatial intrachip gate length… Read more.
15–22 minutes -
Full Citation: Orshansky, M., Milor, L., & Hu, C. (2004). Characterization of spatial intrafield gate CD variability, its impact on… Read more.
11–16 minutes -
Full Citation Choi, M., & Milor, L. (2006). Impact on circuit performance of deterministic within-die variation in nanoscale semiconductor manufacturing. IEEE… Read more.
12–18 minutes -
Full citation: M. Choi and L. Milor, “Diagnosis of Optical Lithography Faults With Product Test Sets,” IEEE Transactions on Computer-Aided Design of… Read more.
9–13 minutes -
Full citation: Muhammad Muqarrab Bashir and Linda Milor, “Determining the Impact of Within-Die Variation on Circuit Timing,” IEEE Transactions on Semiconductor Manufacturing,… Read more.
9–13 minutes